Self-modifying code

[Ge' Weijers]

>From article <1087 at ficc.UUCP>, by peter at ficc.UUCP (Peter da Silva):
> I have a question:
> 
> 	Why are an Icache plus a Dcache better than just
> 	a big shared cache as big as both?

The answer is bandwidth. The CPU does not have to stop filling the instruction
pipeline when it accesses/writes data.
-- 
Ge' Weijers, Informatics dept., Nijmegen University, the Netherlands
UUCP: {uunet!,}mcvax!kunivv1!hobbit!ge