kit posting, what I'm working on

[Brian D. Botton]

In article <1990Dec14.060413.13515 at i88.isc.com> botton at i88.isc.com (Brian D. Botton) writes:
>In article <111 at limbic.ssdl.com> gil at limbic.ssdl.com (Gil Kloepfer Jr.) writes:
>>Sounds good.  There's quite a bit of software which needs to be developed
>>for the ROM though.  Only problems I see are making ROMable code from
>>the compiled (COFF) output, and maybe trying to squeeze lots into 32K.
>

  Guess what folks, I just dug out my TI memory data book and found something
very interesting.  The 3B1/7300's motherboard supports 14 address lines to the
ROMs for a max of 2 X 16k = 32k.  However, the program pin, pin 27, is not
connected, and the programming voltage pin, pin 1, is tied to +5V.  If you
look a few pages further into the data book, you come across the 27512, which
uses these 2 pins for added address lines, for a total of 2 X 64k = 128k!
  So, by running a couple of white wires we can have our cake and eat it too!
There might be a problem with pin 1, depending on where the +5V trace is, but
there are easy ways around this even if it is burried.  For those of you who
have done a P5.1 upgrade, this would be trivial.

  So, new we have the potential of 128k ROM space.  That's more then enough
for a video based ROM with built in monitor, diagnostics, alternate boot, etc.
Let me know what you think.

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