106 mip PC

[Chris Calabrese[mav]]

In article <4860 at infmx.UUCP>, aland at infmx.UUCP (Colonel Panic) writes:
> Keep in mind that MIPS comparisons to mainframes are meaningless for
> at least two reasons.  One, the 370 instruction set is MUCH larger 
> than a 486's, so it can do more with each instruction (e.g. conversion
> from packed decimal to binary is ONE assembler instruction!)
> Two, they use distributed I/O, so the CPU doesn't have to worry
> about losing cycles to disk or terminal I/O.  

The second one is _definitely_ true, but the first is more
questionable.  While the 370 may be able to do packed decimal to
binary in one assembler instruction, there's no guarantee that it can
actually execute faster than a tightly coded assembler routine for the
486.  I've never used a 370, but on the VAXen we have around here,
we've written assembler routines that run faster than some of the
micro-coded instructions (the trick is to get all the code and data to
fit in the cache).  Remember, one instruction != 1 cycle (except on
certain RISC architectures).

MIPS ratings, in theory, are calculated by taking the number of cycles
that would be needed to run some algorithm and deviding by a
magic constant (like the number of cycles it would take on a VAX,
hence VAX equivelant MIPS), finally doing the calculations with clock
speed, memory refresh times, number of cycles for a memory read or
write, etc.  This is _supposed_ to get equivelant numbers for
equivelant CPU horsepower.

On the other hand, CPU horsepower is usually just a small fraction of
what's going on in most mainframe applications.
Name:			Christopher J. Calabrese
Brain loaned to:	AT&T Bell Laboratories, Murray Hill, NJ
att!ulysses!cjc		cjc at ulysses.att.com
Obligatory Quote:	``pher - gr. vb. to schlep.  phospher - to schlep light.philosopher - to schlep thoughts.''