GaAs CMOS in Cray-3 ?

[Arnie Frisch]

In article <3892 at portia.Stanford.EDU>, brooks at portia.Stanford.EDU (Michael Brooks) writes:
> 
> As regards the Cray-3 GaAs devices:

I believe the answer is the use of an enhancement/depletion process,
where the pull-down devices are enhancement (positive thresh-hold
voltage) and the pull-up devices are depletion (negative thresh-hold
voltage) - both N channel.  This gives a very simple intergate voltage
level shifter - namely, none.  This process has only become recently
practical because of the thresh-hold voltage control necessary.

Arnold Frisch
Tektronix Laboratories