*nix performance

Doug Gwyn gwyn at smoke.BRL.MIL
Sun Oct 23 06:44:24 AEST 1988


In article <1279 at umbc3.UMD.EDU> brian at umbc3.UMD.EDU (Brian Cuthie) writes:
>DMA places the processor in a HOLD state while the transfer takes place.

This is true for a "cycle stealing" implementation of DMA, but other
implementations are possible (for example, using dual-ported memory).



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