Cache controllers, can Xenix use them?

[Robt. I. Ransbottom]

In article <195 at icc.UUCP>, wdm at icc.UUCP (Bill Mulert) writes:
> use in personal computers. Some [...386] machines have the Intel
> cache controller chip, and 32 to 64k of 30ns ram. 
> 
> My question is, is this cache controller usaeble by any of the
> Unix - Xenix kernels? Does'nt the kernel have to know about it
> in order to use it? Do any of Microport, SCO, Interactive
> support the chip? Would one be wasting ones money to buy a

The kernels of Microport & Interactive Unix do not have difficulty
with the cached memory.  I don't think Xenix would either.  This
is pretty transparent to *ix.

BUT:

Where you may have some difficulty is with a machine which
runs all (usu. 16meg.) memory through the cache.  An example is 
the Dell 310.  If there is not a way to disable the caching of
a Meg or so of the address space you may have problems getting
an intelligent i/o board to work.  (The cache sees no reason to
pass the data to/from the memory space the board is using.)
I hear that the same problem occurs with dumb boards.

-- 
 ...!uunet!phavl!rob              Robert Ransbottom