Make dependencies and nested include files

Conor P. Cahill cpcahil at virtech.UUCP
Thu Oct 12 23:24:09 AEST 1989


In article <10115 at encore.Encore.COM>, corbin at maxzilla.Encore.COM writes:
> Does anyone have an idea of how to handle nexted include file
> dependencies in make?  Given that test includes test.h, test.h
> include test1.h and test1.h include test2.h.  When test2.h is
> touched test.c will not get rebuilt given the follow make dependencies:
> 
> test.c:	    test.h
> test.h:	    test1.h
> test1.h:    test2.h
> 
> Can this be done in make or is
> 
> test.c:	    test.h test1.h test2.h

There is a problem in both of these dependencies.  A "dependency" is an 
item that is required to build the target.  The *.h files are not dependencies
for the .c file.  The *.h files and the .c file are dependencies for the 
.o file (or executable, if there are no other .c files and you set up the 
makefile appropriatly).

The first example has one include file dependent upon the other, but that is 
not a true dependency since test1.h is not needed to build test.h (it is
necessary to interpret/process test.h, but that is in the build step for the
object file, not the include file)

> I have a grep/sed/awk script that will generate the first example by
> scanning all the sources (.s .c .h).  I'm just learning sed/awk and it
> would probably take me weeks to figure out how to generate the second case.

2 points.  

	1. are you just hard coding the nested include, or are you actually
	   parsing the files and only including the needed files.  For example
	   if your program runs int:

		#ifdef USE_SGTTY
		#include <sgtty.h>
		#else
		#include <termio.h>
		#endif

	   do you properly interpret this as a single include of the
	   appropriate file?

	2. The imake program source (on the X11 release tape) does include
	   a shell (I think) that uses cpp to parse the file and then scans
	   the output to properly generate the dependency list.  There probably
	   are other PD/Shareware/FSF software to do the same.
		


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