Information on SPARC assembly (atomic Test and Set)

[Doug Gwyn]

In article <577 at lakart.UUCP> dg at lakart.UUCP (David Goodenough) writes:
>So the bottom line is all you need is the ability to capture the state
>of a bit, and set it no matter what, all in one atomic instruction.

The key is that it be atomic; not all "add with carry" instructions are.
On the PDP-11, we used to use something like TST and INCB as the two
semaphore basic instructions; it was tricky due to the bus supporting
both byte and word transfers.

When generalizing to multiprocessor architectures, many designers seem
to have found "test and set" more suitable for the purposes of basic
synchronization than an arithmetic operation would be.