The 24 bit Memory Problem

Brian Rosen marsmcro!br at uunet.uu.net
Wed Apr 17 11:00:00 AEST 1991


>We just installed 3 4MB SIMM Chips on our SPARC 1+ (hoping to skootch it
>up to 24 MB;  it alread had 12 MB on board.) We can't seem to figure out
>how to get the Sparc to recognize the new chips.  It always counts 12 MB.
>I'd RTFM, but can't find ANYTHING in through the global index.  The chips
>came w/o documentation.

Woops, you just tried to make a 24 bit memory.  Each SIMM is 1Mx9 (or
4Mx9).  Of the 9 bits, one is for parity (error checking), so you have 8
data bits.  The SS1+ has a 32 bit wide data path, so you need to add SIMMs
in groups of 4 (4x8=32).  When you added three SIMMs, you only got 24 bits
of memory.  The SPARCstation tests memory when it boots.  Since it tries
all 32 bits, it found that 8 of yours weren't working, and thus only
attempted to use the 12MB that was already there.

This implies that you can increase memory in 4MB hunks if you use 1M x 9
SIMMs, but if you use 4M x 9 SIMMs, you add in 16MB increments.  This
applies to SS1 and SS1+.  In some systems coming on the market, memory is
organized as 64 bits wide (for those of you reading the trades, this is
the "MBus").  In these systems, you have to add 8 SIMMs per bank, so your
increments are 8MB and 32MB respectively.



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